In recent years, along with development of the digital technology, electronic devices such as portable information devices and information home appliances have increasingly higher-level functionalities. There is thus a higher demand on nonvolatile memory elements for an increase in capacity, a reduction in power for writing, an increase in speed for writing/reading, and a longer operating life.
In response to such a demand, it is said that there is a limit on the miniaturization of existing flash memories using floating gates. On the other hand, a nonvolatile memory element (i.e., a variable resistance memory) using a variable resistance layer as a material of a memory unit can be composed of a simple-structured memory device represented by a nonvolatile memory element, which therefore lays high expectations for further miniaturization, increase in speed, and reduction in power consumption.
The variable resistance layer which is used as a material of the memory unit will have resistance changing in value from high resistance to low resistance or from low resistance to high resistance by input of electric pulses or the like, for example. In this case, it is necessary that two values of low resistance and high resistance be clearly distinguished, a change between low resistance and high resistance be stable at high speed, and these two values be held in a nonvolatile manner. Various proposals have been hitherto made with the view of such stability of memory characteristics and miniaturization of memory elements.
As an example of this nonvolatile memory element, a nonvolatile memory device using stacked transition metal oxides with different oxygen deficiencies for the variable resistance layer has been proposed. For instance, Patent Literature (PTL) 1 discloses a change in resistance is stabilized by selectively causing an oxidation-reduction reaction at an electrode interface in contact with a variable resistance layer with a low oxygen deficiency.
Each of these conventional nonvolatile memory elements includes a lower electrode, a variable resistance layer, and an upper electrode. The nonvolatile memory elements are arranged two- or three-dimensionally to form a memory cell array. In each nonvolatile memory element, the variable resistance layer has a laminated structure of a first variable resistance layer and a second variable resistance layer that comprise the same transition metal oxide. The transition metal oxide included in the second variable resistance layer has an oxygen deficiency lower than that of the transition metal oxide included in the first variable resistance layer.
With such a structure, applying voltage to a nonvolatile memory element will result in the majority of the voltage being applied to the second variable resistance layer having a lower oxygen deficiency and a higher resistance value. Moreover, oxygen capable of contributing to the reaction is abundant in the vicinity of the interface between the second variable resistance layer and the upper electrode. Thus, the oxidation-reduction reaction selectively occurs at the interface between the second variable resistance layer and the upper electrode, which allows the resistance to change stably.